The newest DDR5 memory overclocking world record is now 11202 MT/s

[erek]

That sure is a lot of Mega Transfers. We approaching the acceptability of measurements within GT/s soon or Giga Transfers per Second?

"As we can see, the overclocking scene has seen a rapid increase in world records as the PC market has shifted to the newer standard. Seby’s OC attempt has beaten the previous world record of 5567.5 MHz (11135 MT/s) from Hicookie. Do not be surprised if this DDR5 frequency world record is surpassed soon, as memory makers push even faster and more binned kits to the market."

Source: https://videocardz.com/newz/ddr5-memory-has-been-overclocked-to-11202-mt-s

 

[sfsuphysics]

That sure is a lot of Mega Transfers. We approaching the acceptability of measurements within GT/s soon or Giga Transfers per Second?

I mean we kind of already are well into that reasonable realm for that, but bigger numbers = better! So I expect them to stick with MT/s still

 

[erek]

I mean we kind of already are well into that reasonable realm for that, but bigger numbers = better! So I expect them to stick with MT/s still

i'm disappointed about the larger latency numbers

wish someone would care about that

 

[doubletake]

i'm disappointed about the larger latency numbers

wish someone would care about that

In what context? A subsection of the high-end market already exists for lower timings + moderate OC, rather than max possible frequencies, and in situations like OC records chasing, raw bandwidth is king, so there's no use focusing on something irrelevant.

 

[KazeoHin]

i'm disappointed about the larger latency numbers

wish someone would care about that

I mean, Latency in real-time (not clock cycles) hasn't moved for decades, its an electrical limit.

 

[erek]

I mean, Latency in real-time (not clock cycles) hasn't moved for decades, its an electrical limit.

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

 

[KazeoHin]

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

Has it? Has the real-time latency gotten worse?

 

[Red Falcon]

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

Miss the days of DDR1 with 2-2-2-5 timings.
This is truly an incredible leap in bandwidth, and it is crazy to think that DDR4 caps out at around 3200-3600MT/s as per JEDEC, and yet DDR5 can reach over 11000MT/s.

What a time to be alive!

 

[erek]

Miss the days of DDR1 with 2-2-2-5 timings.
This is truly an incredible leap in bandwidth, and it is crazy to think that DDR4 caps out at around 3200-3600MT/s as per JEDEC, and yet DDR5 can reach over 11000MT/s.

What a time to be alive!

Didn’t some dip into cas 1.5 territories even

 

[DPI]

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

Memory timings are contextual. They're not particularly meaningful without considering the whole.

 

[sfsuphysics]

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

How is it worse? CL is based on how many cycles the RAM goes through, so without actual ram speed CL by itself is meaningless.

E.g. CL5 sounds better than CL40 but of the later cycles through 10 times as many times in the same time period then CL40 is actually better. (Yeah I probably goofed in over simplifying as an example)

 

[erek]

How is it worse? CL is based on how many cycles the RAM goes through, so without actual ram speed CL by itself is meaningless.

E.g. CL5 sounds better than CL40 but of the later cycles through 10 times as many times in the same time period then CL40 is actually better. (Yeah I probably goofed in over simplifying as an example)

“DDR5-4800 CL40 memory adds only ~3% more to the system latency than DDR4-3200 CL22, which is apparent in synthetic benchmarking …”

 

[sfsuphysics]

“DDR5-4800 CL40 memory adds only ~3% more to the system latency than DDR4-3200 CL22, which is apparent in synthetic benchmarking …”

Yeah but you are cherry picking the ram to make a point, you pick a midrange ddr4 speed versus basically the slowest ddr4 available. Why not ddr4-2166 or ddr5-6000?

 

[Red Falcon]

Yeah but you are cherry picking the ram to make a point, you pick a midrange ddr4 speed versus basically the slowest ddr4 available. Why not ddr4-2166 or ddr5-6000?

3200MT/s is the top DDR4 via JEDEC spec, so I wouldn't necessarily call it mid-range, even though DDR4 is obviously capable of 3600MT/s+.
Also, do you mean 2133MT/s?

The slight increases in latency haven't really affected performance negatively as much as the high data transfer rates have positively affected performance.

 

[sfsuphysics]

3200MT/s is the top DDR4 via JEDEC spec, so I wouldn't necessarily call it mid-range, even though DDR4 is obviously capable of 3600MT/s+.
Also, do you mean 2133MT/s?

possibly, I completely skipped the ddr4 era, but again to show my point, cherry picking the best speed ddr4 vs the lowest speed ddr5 and saying ah ha latency!!

 

[erek]

possibly, I completely skipped the ddr4 era, but again to show my point, cherry picking the best speed ddr4 vs the lowest speed ddr5 and saying ah ha latency!!

In the spirit of what I meant would be cherry picked DDR (1) vs DDR5 to indicate how bad it’s gotten

 

[LukeTbk]

i was referring to how from DDR1 to DDR5 latency has moved up (as in gotten worse)

DDR1 at is best latency was similar than DDR5 already:
https://en.wikipedia.org/wiki/CAS_latency

DDR-400 cas 2 :

10.00 ns​

17.50 ns​

27.50 ns​

DDR5-6000 cas 30 =

10.00 ns​

10.50 ns​

11.17 ns​

That 60% and 40% of the latency for 4th word and 8th word, similar first word (6000/15 = 400, exactly like 30/15 =2).

By the end life of DDR5 I imagine we will again see 8 ms or so for the best kit, which would be again among the lowest latency in ddr history no ?

 

[erek]

DDr1 at is best latency was similar than DDR5 already:
https://en.wikipedia.org/wiki/CAS_latency

DDR-400 cas 2 :

10.00 ns​

17.50 ns​

27.50 ns​

DDR5-6000 cas 30 =

10.00 ns​

10.50 ns​

11.17 ns​

That 60% and 40% of the latency for 4th word and 8th word, similar first word (6000/15 = 400, exactly like 30/15 =2).

By the end life of DDR5 I imagine we will again see 8 ms or so for the best kit, which would be again among the lowest latency in ddr history no ?

Thanks for the education, seems I picked up on some misunderstandings along the way. Unfortunately may of been a TechTuber

 

[LukeTbk]

Thanks for the education, seems I picked up on some misunderstandings along the way. Unfortunately may of been a TechTuber

It is a very common misconception, but some place like pcpart picker let you see the latency in first word millisecond instead of the less obvious need to make some calculation cas numbers,