IBM Announces Breakthrough Chip-Stacking Technology

[Rich Tate]

IBM believes it has created a manufacturing process that could potentially allow for the creation of three-dimensional chips. What is even more interesting is that the chips will also extend Moore’s Law beyond its limits.

The IBM breakthrough enables the move from horizontal 2-D chip layouts to 3-D chip stacking, which takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip.

Blame longtime reader Lazz.

 

[falkan]

IBM chip breakthroughs

This is the fifth major chip breakthrough in five months from IBM, as it leads the industry in its quest for new materials and architectures to extend Moore’s Law.

In December, IBM announced the first 45nm chips using immersion lithography and ultra-low-K interconnect dielectrics.

In January, IBM announced “high-k metal gate,” which substitutes a new material into a critical portion of the transistor that controls its primary on/off switching function. The material provides superior electrical properties, while allowing the size of the transistor to be shrunk beyond limits being reached today.

Strange, I seem to remember Intel being the ones to announce that. This article is not mistaken when it refers to IBM, is it?

 

[young wing]

Strange, I seem to remember Intel being the ones to announce that. This article is not mistaken when it refers to IBM, is it?

Of course not.

 

[lazz]

Additional Info:

http://www.informationweek.com/news/showArticle.jhtml?articleID=199000995

The article and claims are accurate. Sciencedaily is a pretty reputable site, if a bit light on the actual scientific side of its reporting.

Official IBM press release:

http://www-03.ibm.com/press/us/en/pressrelease/21350.wss

It has the claims as well about the recent advancements in chip design, etc. so I'd assume it was IBM, and not Intel.

 

[venm11]

I don't see where this affects moore's law....unless you mean overall package size.

Chip stacking is just an improvement on multiple dies sharing the same package, which Intel (since pentium pro) and IBM (early Power cpus) have been doing for awhile. They are not talking about stacking traces, cells, etc. This only reduces trace length between dies on the pcb, not on the chip itself.