SETI.Germany's 15th Annual Pentathlon (2024)

Gilthanis

Gilthanis

[H]ard|DCer of the Year - 2014
Joined
Jan 29, 2006
Messages
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This post gets updated throughout the event. Always check back for updates!
https://www.seti-germany.de/boinc_pentathlon/
The BOINC Pentathlon starts on 05 May 2024, 00:00 UTC, and ends on 19 May 2024, 00:00 UTC. So, it will run for exactly 14 days. We finished in 5th place last year.

The BOINC Pentathlon consists of 5 disciplines:

  1. Marathon (14 days) - PrimeGrid (Cullen Prime Search LLR sub project ONLY!)
    After making your account, make sure to join our team at this link - https://www.primegrid.com/team_display.php?teamid=1710
    For those wanting a sit and forget contribution, this is the one to set up.
    These work units are quorum of 1. So, no need for a wingman to confirm it. Just get them returned within the deadline.
  2. Sprint (3 days) - Numberfields (CPU and GPU capable)
    5/5 - 5/8, After joining the project make sure you join the team at this link - https://numberfields.asu.edu/NumberFields/team_display.php?teamid=19
    These work units are quorum of 1. So, no need for wingmen. Just get them returned within the deadline and hopefully the validator doesn't take a dump before time is up.
  3. City Run (5 days)
  4. Steeplechase (7 days, with bonus credits on 2 one-day obstacles)
  5. Javelin Throw (5 x 1 day, only each team's third best daily score counts)

Previous year's threads
2023 - https://hardforum.com/threads/seti-germanys-14th-annual-pentathlon-2023.2026968/
2022 - https://hardforum.com/threads/seti-germanys-13th-annual-pentathlon-2022.2018539/
2021 - https://hardforum.com/threads/seti-germanys-12th-annual-boinc-pentathlon-2021.2009895/
2020 - https://hardforum.com/threads/seti-germanys-11-annual-boinc-pentathlon-2020.1995136/
2019 - https://hardforum.com/threads/2019-boinc-pentathlon.1980089/#post-1044154864
2018 - https://hardforum.com/threads/9th-annual-boinc-pentathlon-hosted-by-seti-germany.1957969/
2017 - https://hardforum.com/threads/10th-...sted-by-seti-germany.1980020/#post-1044152665
2016 - https://hardforum.com/threads/7th-annual-boinc-pentathlon-2016.1896285/
2015 - https://hardforum.com/threads/boinc-pentathlon-2015.1858766/
 
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Reserved

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Here is a list of some videos for assisting newer users to get started and tweak things.

How to install BOINC
Windows -
Ubuntu 19.10 -
Mint 19.2 -

Bunkering tactics
Most basic bunkering -
Modifying Windows host file -
Windows Defender Firewall -
Router Firewall -
Suspending work units -
 
Tips
1. If you want a set and forget contribution, we recommend you attach your CPU's to whatever project is announced for the Marathon. This means it should contribute the entire event and won't necessarily require you to do anything but attach and let it run. The more active members will change their pace as needed and add where we need them most. Consider yourself the anchor to hold our position.
2. If you are confused or feel in over your head, please ask for guidance. We have some guys that have a lot of experience that can walk you step by step if needed.
3. Not all projects support GPU's. If you want to support with a GPU, ask us for assistance and we will try and guide you.
4. Don't think that a little contribution doesn't help. Three years ago, we barely got beat for 5th place and just a little more could have gone a long way. If you have ANY hardware that you can fire up for the event, please do so. Depending on the project, old gear might run just as quick as new gear. We will see.
5. Linux almost always performs better than Windows but Windows is MUCH easier to get things happy.
6. You may hear us throw out a term called "bunkering". You don't need to do this if you don't want to be hands on tweaking often and monitoring things. However, if you are willing to get your feet wet and dig in, you can certainly help make gains a lot better for the team during the event. Again, only if you are comfortable and are willing to monitor things throughout each day.
7. You may hear us discuss multiple clients. This is a whole lot of learning. I don't recommend you doing this until you have a pretty good grasp of the BOINC client first.
8. If you want to use your GPU(s), feel free to pick one of the events we list for GPU's (as they are announced) or ask us where they would be best served. We may ask you to switch as strategies shift. We won't be offended if you decide to just leave them on one of your choice.
9. It would be advisable to load up BOINC and test your rigs in advance to the event if possible. This gives you time to make sure that it is stable and can handle 24/7 processing.
10. It is advisable to attach to a project as soon as it is announced in order to get all the necessary files downloaded as soon as possible. You can even speculate on what projects in advance to be ready. You may find the project struggling when first announced as many users will be doing the same and pulling files down can clog the pipeline. It may go on for a while since this is also typically when many people start building their bunkers as well.

Strategies
1. Bunkering is critical for this event. If you are comfortable with the BOINC client, consider delving into some of the intricate ways of strategy. https://hardforum.com/threads/bunkering-why-you-should-or-should-not-do-it.1829159/
2. Multiple clients will most likely become more and more critical with every event. They too are a bit more complex and may need some guidance. If you are willing to delve into such things, reach out to one of us and we will try and walk your through it.
3. Ask everyone you know if they are willing to help out for a few weeks. Even small contributions really help out. Some teams are comprised of mostly small contributing users but are power houses in these events. We can do the same.
4. Mining rigs can certainly help but not all of them are built for DC projects very well. Don't feel bad if you don't get the results you expected. Some GPU work needs a full CPU thread. Small CPU's may not be able to fully utilize all cards. If you bring such setups, feel free to ask for best utilization advice.
5. There are GPU capable projects that older GPU's (typically AMD) work better than some newer projects because of double precision capabilities. There are only a few out there but it does happen. Don't get discouraged if your newer cards aren't performing as well compared to others. Not all hardware is created equal but your contributions still help.
6. Since the Obstacle Course consists of 3 days where there is bonus points, it is most efficient to bunker your work units and only release them on those days or after. That is of course if your bunkers haven't reached their deadlines already.

Suggested tactics for the new users -
This section will be updated as more information is provided for the event.
For those wanting set and forget -
Just attach to the Marathon project. You can put all of your CPU's on this project for the entire 14 days.
If you want your GPU to help, you can just pick the project for the javelin throws and let that project run.

For those wanting to contribute a little more.
If you don't want to go too crazy, you could focus the CPU's on the Marathon, but there will certainly be times when we could use them elsewhere. Keep an eye on the announcements and discussion and feel free to toss them wherever we may need some help.
GPU's on the other hand will probably take a lot more planning and strategy. There may be multiple projects overlapping requiring us to choose where to allocate things. Feel free to just pick one in those cases or ask where it will be best served. Sometimes we can direct you to simply "hold the line" while others move their gear around to make things simpler.

Deadlines for Projects:
These will be added as projects are announced
 
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I've come out of hibernation and now have all my old Threadrippers fired up and ready to crunch, along with a couple of Intel rigs, and my new DD 7950X rig I built in Dec. I will have 11 computers in total, with 364 threads worth of compute power. No GPU's, though, beyond a single 2080 Super in one of the Intel rigs and the 7900 XTX in my daily.
 
RFGuy_KCCO said:
I've come out of hibernation and now have all my old Threadrippers fired up and ready to crunch, along with a couple of Intel rigs, and my new DD 7950X rig I built in Dec. I will have 11 computers in total, with 364 threads worth of compute power. No GPU's, though, beyond a single 2080 Super in one of the Intel rigs and the 7900 XTX in my daily.
Click to expand...
Glad to see you back!
 
Note: the marathon project which will be announced on May 2nd (Thu) May 1st (Wed) at 5pm/8pm PT/ET. As stated above the marathon should be the easiest to run (set and forget).

We have a dedicated slack channel for those who want to actively discuss strategies, resource allocation, etc during the pentathlon. Just PM any of the DC active members for invite together with your email. If you already in our slack, just let us know there.
 
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pututu said:
Note: the marathon project which will be announced on May 2nd (Thu). As stated above the marathon should be the easiest to run (set and forget).

We have a dedicated slack channel for those who want to actively discuss strategies, resource allocation, etc during the pentathlon. Just PM any of the DC active members for invite together with your email. If you already in our slack, just let us know there.
Click to expand...
The slack info is also in the pinned thread https://hardforum.com/threads/h-orde-central-6-0-everything-dc-faqs-guides-tips-and-tricks.1829300/
 
Bump. With about 2 days left, the marathon cpu project will be announced on May 1st (Wed) at 5pm/8pm PT/ET

Get ready [H]ordes!.

So far 24 teams have signed up. Team TAAT came first in 2022 and 2023 led by our ex-Horde.
 
wareyore said:
I'm not going nuts like last year. But, I did get a cheap 4060 I'll add to the gpu stuff.
Click to expand...
Scaled down my gpu inventory when compare to last year. I'm trying to see if the aging gpu can still contribute reasonably well. I still have one Radeon VII that I decided to set it up for einstein if it got chosen. PPD is not bad. See my today's post here: https://einsteinathome.org/content/testing-radeon-vii-all-sky-gravitational-wave-o3-o3as. Linux is much faster than Windows.
 
I don't have a Radeon VII but I've been using CoreCTRL for a few years now with RX570s and a 6750xt and never once have I had a problem with it. For reference I'm running Manjaro on both my systems.
 
Jeeper's pre-race commentary yesterday. With about 2 hours to go for the first project announcement, get ready [H]ordes. Let the fun (ahem suffering/distress/anxiety/frustration.) begins ;) .

30 April 2024 – It's starting again​


A year ago I asked ChatGPT if it knew about the BOINC Pentathlon. Back then, the system crashed because of this difficult question. But this year, it has been proven that artificial pattern recognition captures what is ahead of us again. MS Copilot won against Gemini with the following lines:


Yes, I know the BOINC Pentathlon. This competition is inspired by the ancient Olympic Games and takes place in the BOINC universe. Here are the key facts:

Date: From 5 May 2024, 0.00 UTC, to 19 May 2024, 0.00 UTC.
Disciplines: Teams compete in five different BOINC projects to earn points and win medals.
Challenge: The BOINC Pentathlon is an innovative competition that puts the teams' skills to test.
If you are looking for more information, please visit the official BOINC Pentathlon website
Good luck to the participating teams! 🏆🌟
Well, I cannot put it much better than that. AI is a great artisan, but will never be an artist. And above all, it will always lack one thing: fun; as it will inevitably be for the more than two dozen teams this year. And in the end, this is what it is all about! What a poor soul an AI is for having to work hard all the time, constantly being fed stupid questions, having to do the work for others, and then they even have all the fun…

The 15th edition is upon us this year. Pentathlons full of excitement, fun, and sleepless nights are behind us. Some of the crunchers taking part today were still filling diapers back then, and thus delivered completely different kinds of work units (for the parents). Kids, how time flies.

The top 12 from last year have already signed up and there is still a couple of days left to further fill the field. Everyone can take part here and fight for positions, even if it is just for the last place.

This year sees the return of the Marathon. It is perfect for those who still want a touch of calm despite all the brisk exercise. City Run, Sprint, and Javelin Throw are on the schedule as well. The Steeplechase is a new variant of the Obstacle Run this year, only shorter and more intense. The venues are still a secret.

I will accompany you again this year. Since 2010, quite a few words have accumulated. If you want to recap them, you can do so in the SG-Wiki (2010–2015) and on the Pentathlon website (since 2016). As last year, I will comment on no more than two rankings per day, so that the texts do not get tooo looooooooooooooong.

TeAm AnandTech (TAAT) won last year and could score a hat trick this year. Only Planet 3DNow! (P3D) has managed to do so before and they will certainly try everything to prevent this. SETI.Germany (S⁠G) also wants to be on the big podium again this year and will face tough competition. How strong will LinusTechTips_Team (LTT) perform? Or [H]ard|OCP ([H])? Can Rechenkraft.net (RKN) surprise us again and what about L'Alliance Francophone (AF) and Czech National Team (CNT)? And maybe SETI.USA (SUSA) will be in the mix again?

You see it will be exciting again at the BOINC Pentathlon; it's starting again on 05 May 2024 - the daily bulletin, too.
 
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The first project announced is PrimeGrid. Make sure to log into your PG account and change your preferences https://www.primegrid.com/prefs.php?subset=project
You only want to select the Cullen Prime Search work units.
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Make sure you uncheck all other work units types including those for your GPU's. Cullen only has CPU work but you don't want to pull any GPU work for any of the other sub projects.
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Also, don't forget to press the update button.
 
Note that this CUL (Cullen Prime Search) task can take on average 107 hours to complete based on recent data. That's assuming you are running one thread per task.
Recommendation: Turn HT off or run 50% of the total cores. I would recommend running at least 4 to 8 threads per task (see blue box by entering "8") when you are editing the "PrimeGrid preferences" page up to total available physical cpu cores.

For advanced user:
In addition, each task can take up to 21.5MB of L3 cache. For example, ryzen cpu 3950x has 64MB L3 cache/16 physical cores with two CCDs. For optimum performance, best to run 2 tasks with each task using 8 threads to fit within the cpu L3 cache (21.5MB x 2 = 43MB) as data communication between CCDs add some latency. Basically running one task on each CCD. Intel consumer cpu is based on monolithic design, so there is no latency issue.

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It also indicates it will use around 20 MB of cache so it's probably good to keep that in mind.

I haven't swapped over my Ryzen 2600x yet but I'm not sure if I'm going to since it only has 16 MB of cache.
 
SmokeRngs said:
It also indicates it will use around 20 MB of cache so it's probably good to keep that in mind.

I haven't swapped over my Ryzen 2600x yet but I'm not sure if I'm going to since it only has 16 MB of cache.
Click to expand...
It will still run but from my recollection it will run slower (sub-optimally) than a similar chip with similar core count and clock speed but with at least 22MB of cache.

Anyway, usually there will be another project to be announced tomorrow or the day after. They usually announced two projects before the race starts, so maybe just keep enough work until the next announcement.
 
Neat. Glad to see a PG project, although Cullen would perhaps not be my top choice. Ah well. At least most of my Xeon E5 systems will be able to run two tasks/CPU without too much trouble. I'll get most of my systems switched over to this in a few hours.

pututu What's your experience running this w. the multiple CCXs/CCD on the AMD CPUs? F.ex, here's the cache topology of one of my EPYC chips:

Invalid MIT-MAGIC-COOKIE-1 keyMachine (252GB total)
Package L#0
NUMANode L#0 (P#0 126GB)
L3 L#0 (16MB)
L2 L#0 (512KB) + L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0)
L2 L#1 (512KB) + L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1)
L2 L#2 (512KB) + L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2)
L2 L#3 (512KB) + L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3)
L3 L#1 (16MB)
L2 L#4 (512KB) + L1d L#4 (32KB) + L1i L#4 (32KB) + Core L#4 + PU L#4 (P#4)
L2 L#5 (512KB) + L1d L#5 (32KB) + L1i L#5 (32KB) + Core L#5 + PU L#5 (P#5)
L2 L#6 (512KB) + L1d L#6 (32KB) + L1i L#6 (32KB) + Core L#6 + PU L#6 (P#6)
L2 L#7 (512KB) + L1d L#7 (32KB) + L1i L#7 (32KB) + Core L#7 + PU L#7 (P#7)
L3 L#2 (16MB)
L2 L#8 (512KB) + L1d L#8 (32KB) + L1i L#8 (32KB) + Core L#8 + PU L#8 (P#8)
L2 L#9 (512KB) + L1d L#9 (32KB) + L1i L#9 (32KB) + Core L#9 + PU L#9 (P#9)
L2 L#10 (512KB) + L1d L#10 (32KB) + L1i L#10 (32KB) + Core L#10 + PU L#10 (P#10)
L2 L#11 (512KB) + L1d L#11 (32KB) + L1i L#11 (32KB) + Core L#11 + PU L#11 (P#11)
L3 L#3 (16MB)
L2 L#12 (512KB) + L1d L#12 (32KB) + L1i L#12 (32KB) + Core L#12 + PU L#12 (P#12)
L2 L#13 (512KB) + L1d L#13 (32KB) + L1i L#13 (32KB) + Core L#13 + PU L#13 (P#13)
L2 L#14 (512KB) + L1d L#14 (32KB) + L1i L#14 (32KB) + Core L#14 + PU L#14 (P#14)
L2 L#15 (512KB) + L1d L#15 (32KB) + L1i L#15 (32KB) + Core L#15 + PU L#15 (P#15)
L3 L#4 (16MB)
L2 L#16 (512KB) + L1d L#16 (32KB) + L1i L#16 (32KB) + Core L#16 + PU L#16 (P#16)
L2 L#17 (512KB) + L1d L#17 (32KB) + L1i L#17 (32KB) + Core L#17 + PU L#17 (P#17)
L2 L#18 (512KB) + L1d L#18 (32KB) + L1i L#18 (32KB) + Core L#18 + PU L#18 (P#18)
L2 L#19 (512KB) + L1d L#19 (32KB) + L1i L#19 (32KB) + Core L#19 + PU L#19 (P#19)
L3 L#5 (16MB)
L2 L#20 (512KB) + L1d L#20 (32KB) + L1i L#20 (32KB) + Core L#20 + PU L#20 (P#20)
L2 L#21 (512KB) + L1d L#21 (32KB) + L1i L#21 (32KB) + Core L#21 + PU L#21 (P#21)
L2 L#22 (512KB) + L1d L#22 (32KB) + L1i L#22 (32KB) + Core L#22 + PU L#22 (P#22)
L2 L#23 (512KB) + L1d L#23 (32KB) + L1i L#23 (32KB) + Core L#23 + PU L#23 (P#23)
L3 L#6 (16MB)
L2 L#24 (512KB) + L1d L#24 (32KB) + L1i L#24 (32KB) + Core L#24 + PU L#24 (P#24)
L2 L#25 (512KB) + L1d L#25 (32KB) + L1i L#25 (32KB) + Core L#25 + PU L#25 (P#25)
L2 L#26 (512KB) + L1d L#26 (32KB) + L1i L#26 (32KB) + Core L#26 + PU L#26 (P#26)
L2 L#27 (512KB) + L1d L#27 (32KB) + L1i L#27 (32KB) + Core L#27 + PU L#27 (P#27)
L3 L#7 (16MB)
L2 L#28 (512KB) + L1d L#28 (32KB) + L1i L#28 (32KB) + Core L#28 + PU L#28 (P#28)
L2 L#29 (512KB) + L1d L#29 (32KB) + L1i L#29 (32KB) + Core L#29 + PU L#29 (P#29)
L2 L#30 (512KB) + L1d L#30 (32KB) + L1i L#30 (32KB) + Core L#30 + PU L#30 (P#30)
L2 L#31 (512KB) + L1d L#31 (32KB) + L1i L#31 (32KB) + Core L#31 + PU L#31 (P#31)
L3 L#8 (16MB)
L2 L#32 (512KB) + L1d L#32 (32KB) + L1i L#32 (32KB) + Core L#32 + PU L#32 (P#32)
L2 L#33 (512KB) + L1d L#33 (32KB) + L1i L#33 (32KB) + Core L#33 + PU L#33 (P#33)
L2 L#34 (512KB) + L1d L#34 (32KB) + L1i L#34 (32KB) + Core L#34 + PU L#34 (P#34)
L2 L#35 (512KB) + L1d L#35 (32KB) + L1i L#35 (32KB) + Core L#35 + PU L#35 (P#35)
L3 L#9 (16MB)
L2 L#36 (512KB) + L1d L#36 (32KB) + L1i L#36 (32KB) + Core L#36 + PU L#36 (P#36)
L2 L#37 (512KB) + L1d L#37 (32KB) + L1i L#37 (32KB) + Core L#37 + PU L#37 (P#37)
L2 L#38 (512KB) + L1d L#38 (32KB) + L1i L#38 (32KB) + Core L#38 + PU L#38 (P#38)
L2 L#39 (512KB) + L1d L#39 (32KB) + L1i L#39 (32KB) + Core L#39 + PU L#39 (P#39)
L3 L#10 (16MB)
L2 L#40 (512KB) + L1d L#40 (32KB) + L1i L#40 (32KB) + Core L#40 + PU L#40 (P#40)
L2 L#41 (512KB) + L1d L#41 (32KB) + L1i L#41 (32KB) + Core L#41 + PU L#41 (P#41)
L2 L#42 (512KB) + L1d L#42 (32KB) + L1i L#42 (32KB) + Core L#42 + PU L#42 (P#42)
L2 L#43 (512KB) + L1d L#43 (32KB) + L1i L#43 (32KB) + Core L#43 + PU L#43 (P#43)
L3 L#11 (16MB)
L2 L#44 (512KB) + L1d L#44 (32KB) + L1i L#44 (32KB) + Core L#44 + PU L#44 (P#44)
L2 L#45 (512KB) + L1d L#45 (32KB) + L1i L#45 (32KB) + Core L#45 + PU L#45 (P#45)
L2 L#46 (512KB) + L1d L#46 (32KB) + L1i L#46 (32KB) + Core L#46 + PU L#46 (P#46)
L2 L#47 (512KB) + L1d L#47 (32KB) + L1i L#47 (32KB) + Core L#47 + PU L#47 (P#47)
L3 L#12 (16MB)
L2 L#48 (512KB) + L1d L#48 (32KB) + L1i L#48 (32KB) + Core L#48 + PU L#48 (P#48)
L2 L#49 (512KB) + L1d L#49 (32KB) + L1i L#49 (32KB) + Core L#49 + PU L#49 (P#49)
L2 L#50 (512KB) + L1d L#50 (32KB) + L1i L#50 (32KB) + Core L#50 + PU L#50 (P#50)
L2 L#51 (512KB) + L1d L#51 (32KB) + L1i L#51 (32KB) + Core L#51 + PU L#51 (P#51)
L3 L#13 (16MB)
L2 L#52 (512KB) + L1d L#52 (32KB) + L1i L#52 (32KB) + Core L#52 + PU L#52 (P#52)
L2 L#53 (512KB) + L1d L#53 (32KB) + L1i L#53 (32KB) + Core L#53 + PU L#53 (P#53)
L2 L#54 (512KB) + L1d L#54 (32KB) + L1i L#54 (32KB) + Core L#54 + PU L#54 (P#54)
L2 L#55 (512KB) + L1d L#55 (32KB) + L1i L#55 (32KB) + Core L#55 + PU L#55 (P#55)
L3 L#14 (16MB)
L2 L#56 (512KB) + L1d L#56 (32KB) + L1i L#56 (32KB) + Core L#56 + PU L#56 (P#56)
L2 L#57 (512KB) + L1d L#57 (32KB) + L1i L#57 (32KB) + Core L#57 + PU L#57 (P#57)
L2 L#58 (512KB) + L1d L#58 (32KB) + L1i L#58 (32KB) + Core L#58 + PU L#58 (P#58)
L2 L#59 (512KB) + L1d L#59 (32KB) + L1i L#59 (32KB) + Core L#59 + PU L#59 (P#59)
L3 L#15 (16MB)
L2 L#60 (512KB) + L1d L#60 (32KB) + L1i L#60 (32KB) + Core L#60 + PU L#60 (P#60)
L2 L#61 (512KB) + L1d L#61 (32KB) + L1i L#61 (32KB) + Core L#61 + PU L#61 (P#61)
L2 L#62 (512KB) + L1d L#62 (32KB) + L1i L#62 (32KB) + Core L#62 + PU L#62 (P#62)
L2 L#63 (512KB) + L1d L#63 (32KB) + L1i L#63 (32KB) + Core L#63 + PU L#63 (P#63)


The part I'm worried about is that rather than being 8x32MB caches (a monolithic 32MB per 8-core CCD), it's further subdivided into two 16MB caches per CCD. Have you had any success running a task across both CCXs in a CCD, or does that still brutalise the performance?
 
[Ion] said:
Neat. Glad to see a PG project, although Cullen would perhaps not be my top choice. Ah well. At least most of my Xeon E5 systems will be able to run two tasks/CPU without too much trouble. I'll get most of my systems switched over to this in a few hours.

pututu What's your experience running this w. the multiple CCXs/CCD on the AMD CPUs? F.ex, here's the cache topology of one of my EPYC chips:

Invalid MIT-MAGIC-COOKIE-1 keyMachine (252GB total)
Package L#0
NUMANode L#0 (P#0 126GB)
L3 L#0 (16MB)
L2 L#0 (512KB) + L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0)
L2 L#1 (512KB) + L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1)
L2 L#2 (512KB) + L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2)
L2 L#3 (512KB) + L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3)
L3 L#1 (16MB)
L2 L#4 (512KB) + L1d L#4 (32KB) + L1i L#4 (32KB) + Core L#4 + PU L#4 (P#4)
L2 L#5 (512KB) + L1d L#5 (32KB) + L1i L#5 (32KB) + Core L#5 + PU L#5 (P#5)
L2 L#6 (512KB) + L1d L#6 (32KB) + L1i L#6 (32KB) + Core L#6 + PU L#6 (P#6)
L2 L#7 (512KB) + L1d L#7 (32KB) + L1i L#7 (32KB) + Core L#7 + PU L#7 (P#7)
L3 L#2 (16MB)
L2 L#8 (512KB) + L1d L#8 (32KB) + L1i L#8 (32KB) + Core L#8 + PU L#8 (P#8)
L2 L#9 (512KB) + L1d L#9 (32KB) + L1i L#9 (32KB) + Core L#9 + PU L#9 (P#9)
L2 L#10 (512KB) + L1d L#10 (32KB) + L1i L#10 (32KB) + Core L#10 + PU L#10 (P#10)
L2 L#11 (512KB) + L1d L#11 (32KB) + L1i L#11 (32KB) + Core L#11 + PU L#11 (P#11)
L3 L#3 (16MB)
L2 L#12 (512KB) + L1d L#12 (32KB) + L1i L#12 (32KB) + Core L#12 + PU L#12 (P#12)
L2 L#13 (512KB) + L1d L#13 (32KB) + L1i L#13 (32KB) + Core L#13 + PU L#13 (P#13)
L2 L#14 (512KB) + L1d L#14 (32KB) + L1i L#14 (32KB) + Core L#14 + PU L#14 (P#14)
L2 L#15 (512KB) + L1d L#15 (32KB) + L1i L#15 (32KB) + Core L#15 + PU L#15 (P#15)
L3 L#4 (16MB)
L2 L#16 (512KB) + L1d L#16 (32KB) + L1i L#16 (32KB) + Core L#16 + PU L#16 (P#16)
L2 L#17 (512KB) + L1d L#17 (32KB) + L1i L#17 (32KB) + Core L#17 + PU L#17 (P#17)
L2 L#18 (512KB) + L1d L#18 (32KB) + L1i L#18 (32KB) + Core L#18 + PU L#18 (P#18)
L2 L#19 (512KB) + L1d L#19 (32KB) + L1i L#19 (32KB) + Core L#19 + PU L#19 (P#19)
L3 L#5 (16MB)
L2 L#20 (512KB) + L1d L#20 (32KB) + L1i L#20 (32KB) + Core L#20 + PU L#20 (P#20)
L2 L#21 (512KB) + L1d L#21 (32KB) + L1i L#21 (32KB) + Core L#21 + PU L#21 (P#21)
L2 L#22 (512KB) + L1d L#22 (32KB) + L1i L#22 (32KB) + Core L#22 + PU L#22 (P#22)
L2 L#23 (512KB) + L1d L#23 (32KB) + L1i L#23 (32KB) + Core L#23 + PU L#23 (P#23)
L3 L#6 (16MB)
L2 L#24 (512KB) + L1d L#24 (32KB) + L1i L#24 (32KB) + Core L#24 + PU L#24 (P#24)
L2 L#25 (512KB) + L1d L#25 (32KB) + L1i L#25 (32KB) + Core L#25 + PU L#25 (P#25)
L2 L#26 (512KB) + L1d L#26 (32KB) + L1i L#26 (32KB) + Core L#26 + PU L#26 (P#26)
L2 L#27 (512KB) + L1d L#27 (32KB) + L1i L#27 (32KB) + Core L#27 + PU L#27 (P#27)
L3 L#7 (16MB)
L2 L#28 (512KB) + L1d L#28 (32KB) + L1i L#28 (32KB) + Core L#28 + PU L#28 (P#28)
L2 L#29 (512KB) + L1d L#29 (32KB) + L1i L#29 (32KB) + Core L#29 + PU L#29 (P#29)
L2 L#30 (512KB) + L1d L#30 (32KB) + L1i L#30 (32KB) + Core L#30 + PU L#30 (P#30)
L2 L#31 (512KB) + L1d L#31 (32KB) + L1i L#31 (32KB) + Core L#31 + PU L#31 (P#31)
L3 L#8 (16MB)
L2 L#32 (512KB) + L1d L#32 (32KB) + L1i L#32 (32KB) + Core L#32 + PU L#32 (P#32)
L2 L#33 (512KB) + L1d L#33 (32KB) + L1i L#33 (32KB) + Core L#33 + PU L#33 (P#33)
L2 L#34 (512KB) + L1d L#34 (32KB) + L1i L#34 (32KB) + Core L#34 + PU L#34 (P#34)
L2 L#35 (512KB) + L1d L#35 (32KB) + L1i L#35 (32KB) + Core L#35 + PU L#35 (P#35)
L3 L#9 (16MB)
L2 L#36 (512KB) + L1d L#36 (32KB) + L1i L#36 (32KB) + Core L#36 + PU L#36 (P#36)
L2 L#37 (512KB) + L1d L#37 (32KB) + L1i L#37 (32KB) + Core L#37 + PU L#37 (P#37)
L2 L#38 (512KB) + L1d L#38 (32KB) + L1i L#38 (32KB) + Core L#38 + PU L#38 (P#38)
L2 L#39 (512KB) + L1d L#39 (32KB) + L1i L#39 (32KB) + Core L#39 + PU L#39 (P#39)
L3 L#10 (16MB)
L2 L#40 (512KB) + L1d L#40 (32KB) + L1i L#40 (32KB) + Core L#40 + PU L#40 (P#40)
L2 L#41 (512KB) + L1d L#41 (32KB) + L1i L#41 (32KB) + Core L#41 + PU L#41 (P#41)
L2 L#42 (512KB) + L1d L#42 (32KB) + L1i L#42 (32KB) + Core L#42 + PU L#42 (P#42)
L2 L#43 (512KB) + L1d L#43 (32KB) + L1i L#43 (32KB) + Core L#43 + PU L#43 (P#43)
L3 L#11 (16MB)
L2 L#44 (512KB) + L1d L#44 (32KB) + L1i L#44 (32KB) + Core L#44 + PU L#44 (P#44)
L2 L#45 (512KB) + L1d L#45 (32KB) + L1i L#45 (32KB) + Core L#45 + PU L#45 (P#45)
L2 L#46 (512KB) + L1d L#46 (32KB) + L1i L#46 (32KB) + Core L#46 + PU L#46 (P#46)
L2 L#47 (512KB) + L1d L#47 (32KB) + L1i L#47 (32KB) + Core L#47 + PU L#47 (P#47)
L3 L#12 (16MB)
L2 L#48 (512KB) + L1d L#48 (32KB) + L1i L#48 (32KB) + Core L#48 + PU L#48 (P#48)
L2 L#49 (512KB) + L1d L#49 (32KB) + L1i L#49 (32KB) + Core L#49 + PU L#49 (P#49)
L2 L#50 (512KB) + L1d L#50 (32KB) + L1i L#50 (32KB) + Core L#50 + PU L#50 (P#50)
L2 L#51 (512KB) + L1d L#51 (32KB) + L1i L#51 (32KB) + Core L#51 + PU L#51 (P#51)
L3 L#13 (16MB)
L2 L#52 (512KB) + L1d L#52 (32KB) + L1i L#52 (32KB) + Core L#52 + PU L#52 (P#52)
L2 L#53 (512KB) + L1d L#53 (32KB) + L1i L#53 (32KB) + Core L#53 + PU L#53 (P#53)
L2 L#54 (512KB) + L1d L#54 (32KB) + L1i L#54 (32KB) + Core L#54 + PU L#54 (P#54)
L2 L#55 (512KB) + L1d L#55 (32KB) + L1i L#55 (32KB) + Core L#55 + PU L#55 (P#55)
L3 L#14 (16MB)
L2 L#56 (512KB) + L1d L#56 (32KB) + L1i L#56 (32KB) + Core L#56 + PU L#56 (P#56)
L2 L#57 (512KB) + L1d L#57 (32KB) + L1i L#57 (32KB) + Core L#57 + PU L#57 (P#57)
L2 L#58 (512KB) + L1d L#58 (32KB) + L1i L#58 (32KB) + Core L#58 + PU L#58 (P#58)
L2 L#59 (512KB) + L1d L#59 (32KB) + L1i L#59 (32KB) + Core L#59 + PU L#59 (P#59)
L3 L#15 (16MB)
L2 L#60 (512KB) + L1d L#60 (32KB) + L1i L#60 (32KB) + Core L#60 + PU L#60 (P#60)
L2 L#61 (512KB) + L1d L#61 (32KB) + L1i L#61 (32KB) + Core L#61 + PU L#61 (P#61)
L2 L#62 (512KB) + L1d L#62 (32KB) + L1i L#62 (32KB) + Core L#62 + PU L#62 (P#62)
L2 L#63 (512KB) + L1d L#63 (32KB) + L1i L#63 (32KB) + Core L#63 + PU L#63 (P#63)


The part I'm worried about is that rather than being 8x32MB caches (a monolithic 32MB per 8-core CCD), it's further subdivided into two 16MB caches per CCD. Have you had any success running a task across both CCXs in a CCD, or does that still brutalise the performance?
Click to expand...

Yes, what you have is correct which is the epyc rome Zen2/Matisse cache topology which is subdivided into 16MB L3, see diagram below). The zen3/Vermeer 5950x cache topology (see second diagram below) runs faster than zen2 when L3 cache requirement is greater than 16MB such as cullen LLR. Don't know by how much, just based on the memory topology as presented by AMD during Zen3 launched.


1714656845192.png


1714656746373.png
 
Thanks for the info. I didn't realise there was a topology change between Zen2/Zen3. At least if they've fixed it for Zen 3, that means that it should be unified 32MB caches on the Zen 4 chips, so I can get my 7950Xs doing that too.
 
1714673978314.png

For those not able to efficiently run PG, make sure to load up on this project. It can use CPU and GPU's both.
 
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