Assuming there is a new instruction set for either Barcelona or some future revision/generation, won't software require a code update to take advantage of it? That is the case for SSE4 and the previous new Intel instruction sets, AFAIR.
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Assuming there is a new instruction set for either Barcelona or some future revision/generation, won't software require a code update to take advantage of it? That is the case for SSE4 and the previous new Intel instruction sets, AFAIR.
Won't be seen in Barcelona.
I don't like to assume anything, as should you, or Arstechnica. (because assuming makes an ass outta you and me ) Personally, I'll wait and see what AMD has to say about the matter come it's release thanks. No one knows definitely what all features are coming with Barcelona/K10's release.(except maybe Morfinx haha Damn NDAs! )
Yeah, I'm sure a proposal that was set forth on August 16th will make it into a CPU that should've already been shipping at that time. It's not about assuming, it's about the fact that a proposed standard won't be implemented in a chip who's design is already complete and who's die is already being fabricated.
I was going to mention the new instruction set as a plausible explanation in the 3DMark thread, but decided not to since my knowledge in this area is rather limited. Do you think that could be a possible explanation for the high score, if indeed true? Wouldn't that imply the use of an optimized benchmark, though?This has been talked about for a long time now and being an instruction set it can be added at any time. I would be surprised if it would go into Barcelona now but it's certainly possible for Phenom and it also would explain the 30,000 3DMark 06 score.
But still it's an assumption. And it's starting to make me itchy.
This has been talked about for a long time now and being an instruction set it can be added at any time. I would be surprised if it would go into Barcelona now but it's certainly possible for Phenom and it also would explain the 30,000 3DMark 06 score.
But still it's an assumption. And it's starting to make me itchy.
I was going to mention the new instruction set as a plausible explanation in the 3DMark thread, but decided not to since my knowledge in this area is rather limited. Do you think that could be a possible explanation for the high score, if indeed true? Wouldn't that imply the use of an optimized benchmark, though?
all that it implies, if true... is that AMD's new architecture is absolutely riveting
Yeah, I'm sure a proposal that was set forth on August 16th will make it into a CPU that should've already been shipping at that time.
It's not about assuming, it's about the fact that a proposed standard won't be implemented in a chip who's design is already complete and who's die is already being fabricated.
K10 benchmarks from coolaler, are these credible?
http://www.xtremesystems.org/forums/showthread.php?t=157136
Unfortunately I've found out it has only been announced.
It won't be available until 2yrs. (Bulldozer)
That should give intel enough time to copy AMD's patents
Or attempt to force software companies not to support SSE5.Yep, I read about the SSE5 story this morning. An interesting development to say the least, AMD and Intel do have cross-liscencing agreements on things of this nature, there's no need to copy patents. However, I an curious to whether Intel will (in their eyes) "stoop" to using another AMD created standard, or create something simular like "SSE5a" or "SSE6"?
I think so too.@ APOLLO, I'm not sure what's happening instruction wise now. I was told to keep an eye out for an announcement so I think SSE5 was it.
Very likely. I'm totally ignoring his 'results' and the B1 samples although representative of release batches, will be eclipsed by the B2 stepping before year's end.As for those benchmarks on coolalers site, don't take any notice as they were done with an old B0 heavily patched sample. The retail revisions won't be anything like that chip.
It seems like that guy has the same revision chip that Anand got hold of. If you remember Anand wouldn't publish any results as he rightly believed it was buggy as hell.
Maybe a bit sooner according to morfinx.Only 5 more days now.
I really miss Ed's editorials. That's all they were, editorials, but still a thing I checked every morning at work. Hard, Tom's, OC, my main sites back in the day.And linking to Ed Stroligo - now that's just plain dumb.
Holy Necro Batman! But yes, those were the days.I really miss Ed's editorials. That's all they were, editorials, but still a thing I checked every morning at work. Hard, Tom's, OC, my main sites back in the day.
nice job
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History did repeat. Unfortunately for Intel they just played the Presshot 3.0GHz and have another few years of purgatory to go.
Well, for the high clockspeed processors, they may just decide to charge something in the range of $1000, and therefore reduce demand.
and if you think of the 8xxx cjips as what they really are 4 core/8 thread, not full 8 cores they are not so bad.The FX line got horrible revies and just got raked over the coals endlessly. Yet it is still usable today, unlike the majority of intel CPUs from that era.
and if you think of the 8xxx cjips as what they really are 4 core/8 thread, not full 8 cores they are not so bad.
and i have a 8350 "test box"...Yeah, but they were released at the same time as Sandy Bridge, my i7-3930k is still kicking today as a test box.
between AMDs odd marketing, Tech review sites not reviewing them in a 'like price' model, constant mainstream negative press, battling lawsuits for and against AMD, it is amazing AMD ever made it out, let alone actually made a run for the lead.and i have a 8350 "test box"...
edit: the i7 was also twice the price...
and i have a 8350 "test box"...
edit: the i7 was also twice the price...