Article: CAMM, Dell's new SODIMM standard

To be fair, I think this STARTED as a proprietary thing, but with an 'open design' theoretically if someone else wanted to put in a bunch of time and money they could do it as well, and Dell expected them to be the only ones with the resources to do it. Then JDEC trolled them and was like "Hey this looks nice, lets make it standard and consistent so anyone can do it"
 
commissioneranthony said:
Does anyone have a link to the paper or working group study showing the downfalls of sodimm vs camm? I can imagine that reducing latency is important, but again, why not just update the sodimm spec? Why not just require tighter PCB trace routing and length matching requirements to reduce ringing or require additional clock re-timers (which are used with other high bandwidth communications) if the sodimm modules are placed too far outside of a designated trace length from the main CPU?
This just seems like a pure money play to me without real hard information to back it up.
It's just too easy for large manufacturers to use their business might to change an established standard for reasons none other than new revenue streams.
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Tthis is every single advancement since we moved past the original ISA that came with 8086 and the IBM PC.

VLB, PCI, AGP, PCI-X, PCIE, USB, USB-C, Firewire... eventually you exceed the physical design, and the easy justification for changing it is "we can resell a bunch of stuff again." That's progress.
 
commissioneranthony said:
Does anyone have a link to the paper or working group study showing the downfalls of sodimm vs camm? I can imagine that reducing latency is important, but again, why not just update the sodimm spec? Why not just require tighter PCB trace routing and length matching requirements to reduce ringing or require additional clock re-timers (which are used with other high bandwidth communications) if the sodimm modules are placed too far outside of a designated trace length from the main CPU?
This just seems like a pure money play to me without real hard information to back it up.
It's just too easy for large manufacturers to use their business might to change an established standard for reasons none other than new revenue streams.
Click to expand...
LTT has a decent breakdown on the why's here.

But to break it down, it's a distance / latency problem with the format that makes speeds greater than 6400 not feasible when using more than 1 module.
 
lopoetve said:
Tthis is every single advancement since we moved past the original ISA that came with 8086 and the IBM PC.

VLB, PCI, AGP, PCI-X, PCIE, USB, USB-C, Firewire... eventually you exceed the physical design, and the easy justification for changing it is "we can resell a bunch of stuff again." That's progress.
Click to expand...

Lakados said:
LTT has a decent breakdown on the why's here.

But to break it down, it's a distance / latency problem with the format that makes speeds greater than 6400 not feasible when using more than 1 module.
Click to expand...

Yup. This is great input. You guys are absolutely right. But there needs to be verifiable information why a new standard must be used vs just revising a current standard (clock retimers added to DP2.0 vs creating an entirely new video output interface). Where are my clock diagrams? Where is the specification working document? All we get is marketing wank with nothing to back it up.
What is frustrating is that a lot of the EE working groups are funded by mega corps and do not share information publicly. Do you want to read the specification for compact flash? Its finally available on the internet after 20 years! Originally it cost $325 to view a 100+ page document on how to implement compact flash. Here it is in all its glory:
https://engineering.purdue.edu/ece4...rp07/documentation/cfspc2_0_compact_flash.pdf

You want the modern day cf express specification? Sure that will be $5000!
https://compactflash.org/joincfa/

Here's the nvme spec. it's actually open to the public:
https://nvmexpress.org/wp-content/u...se-Specification-2.0c-2022.10.04-Ratified.pdf

Want the jedec ddr5 spec, that'll be $369:
https://www.jedec.org/standards-documents/docs/jesd79-5b

I still have not found anything from jedec referencing camm. not even a draft.

From the LTT video:
"Why cant we flip the sodimm modules around? Our best guess is that its hard to zig-zag traces around..."
This is nonsense. This is an assumption. Where's the evidence? Why cant jedec or dell just give the public a simple pdf composed in a scientific manner explaining the drawbacks of the current standard and extrapolating on why we need a new standard. I should not be relying on marketing material in a LTT video to educate me about CAMM. Give me the paper instead of giving us marketing filler material.
 
I guess I'm used to having to pay for most specs - gotta keep the groups generating them afloat, and it defers the cost and keeps said specifications "universal" - or at least universally accessible (see Optane, as a contrary result or option, which was doomed by being exclusive to intel). Outside of the POSIX API and the like, that is...

That being said - why do you really care? It's a new spec. They'll keep making SODIMM for quite some time (last I checked, you can still buy new DDR2 even!), and CAMM modules are replaceable, so it's not like this is a proprietary solution that you have to buy a whole new laptop/whatever to upgrade...?

For that matter, what would you do with the spec? Unless you're an EE (which is absolutely possible; I used to have to deal with the SCSI and SAS specs on a frequent basis, but moved further up the stack), it's not like you're going to ~build~ one...?

Guess I'm really used to this. Things change - you find out more details as it gets close to release, and rarely is it a pure money grab - there's always several underlying reasons for the changes that we'll learn about as we get close to real release, and if there isn't, someone will go back and adjust the original spec to compensate or come up with a better alternative (Firewire -> USB/Thunderbolt, eSATA disappearing, etc).
 
lopoetve said:
I guess I'm used to having to pay for most specs - gotta keep the groups generating them afloat, and it defers the cost and keeps said specifications "universal" - or at least universally accessible (see Optane, as a contrary result or option, which was doomed by being exclusive to intel). Outside of the POSIX API and the like, that is...

That being said - why do you really care? It's a new spec. They'll keep making SODIMM for quite some time (last I checked, you can still buy new DDR2 even!), and CAMM modules are replaceable, so it's not like this is a proprietary solution that you have to buy a whole new laptop/whatever to upgrade...?

For that matter, what would you do with the spec? Unless you're an EE (which is absolutely possible; I used to have to deal with the SCSI and SAS specs on a frequent basis, but moved further up the stack), it's not like you're going to ~build~ one...?

Guess I'm really used to this. Things change - you find out more details as it gets close to release, and rarely is it a pure money grab - there's always several underlying reasons for the changes that we'll learn about as we get close to real release, and if there isn't, someone will go back and adjust the original spec to compensate or come up with a better alternative (Firewire -> USB/Thunderbolt, eSATA disappearing, etc).
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Hmm. I guess I'm becoming an old man. Maybe I'm tired of the infinite walls of the hardware space. Maybe I should stop trying to make hardware myself. I used to be able to get literature and specs free in college. Alas, no more.
 
commissioneranthony said:
Hmm. I guess I'm becoming an old man. Maybe I'm tired of the infinite walls of the hardware space. Maybe I should stop trying to make hardware myself. I used to be able to get literature and specs free in college. Alas, no more.
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Oh I get it. And they’re great insomnia cures… but they’re also far beyond anything anyone could build at home now.

If you want that, I’d dig into the open firmware and RISC-V spaces. Fun stuff you could actually do some of at home - I’d you can get your hands on the kit at all, and it’s all open source and spec.

I want a RISC-V board.

And a Raptor Talon, but I ain’t dropping 10k on a Power9 machine 😂
 
lopoetve said:
If you want that, I’d dig into the open firmware and RISC-V spaces.
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Last year I saw a story about a guy who built a homebrew RISC-V (mostly) out of discrete logic. 9 stacked boards implementing most of the base functionality of the CPU design. Ran at half a megahertz.
 
1_rick said:
Last year I saw a story about a guy who built a homebrew RISC-V (mostly) out of discrete logic. 9 stacked boards implementing most of the base functionality of the CPU design. Ran at half a megahertz.
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played minesweeper pretty well, though :)
 
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