All P core chips?

Epyon

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When are we going to get an all P core chip? I would love to do video encodes with that.
 

duronboy

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I'm old enough to remember when CPUs only had a single core, and it was a P CORE. I was telling some children about this the other day and they said, "sure grandpa, let's get you to bed." I had a dream about delicious cereal.

oops.jpg
 

Grebuloner

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When are we going to get an all P core chip? I would love to do video encodes with that.
The i5s (minus K) and i3s are all P core. You can use the P/E chips without the E, but it'll be slower. Don't think Intel sees consumers as needing more P cores on their mainstream chips.

Or: wait for the next HEDT release or go for AMD which still believes in high P core count chips and AVX-512.
 

vegeta535

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The i5s (minus K) and i3s are all P core. You can use the P/E chips without the E, but it'll be slower. Don't think Intel sees consumers as needing more P cores on their mainstream chips.

Or: wait for the next HEDT release or go for AMD which still believes in high P core count chips and AVX-512.
Pretty sure he talking about having a cpu with 16p cores and not 8p/8e. Which I agree E core is a bad solution to get power and temps under control.
 

Grebuloner

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Pretty sure he talking about having a cpu with 16p cores and not 8p/8e. Which I agree E core is a bad solution to get power and temps under control.
Yeah, I figured. It's why I mentioned the other options. I think we're entering another desktop core count stagnation period.
 

Epyon

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Hand brake can do multiple encodes at once. I was thinking about just buying a thread ripper and sticking it outside my house 24/7
 

bwang

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Sapphire Rapids is all-P, the question is (1) if it will be available as a prosumer product and (2) when the hell it will actually launch.
 

whateverer

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I am a fan of under volting. But that may not be enough

And most consumers would rather let windows handle core switching automatically: with mixed you get better overall performance in multi-threaded and lower idle power!

undervolting does nothing for leakage out of those big cores at idle
 

whateverer

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Not talking about idle.
sure

but for most typical multithreaded workloads, the 4x density these new atoms bring over the p-cores make under-volting p-cores to raise efficiency pointless! Just add 16 e-cores in place of 4 more traditional cores (both with AVX2 support, so no moe variable performance issues) to roughly double performance

and if for some reason you're not talking about 8+ thread multitasking, then what exactly are you aiming to do that the 6 cor 12 thread part cant do?
 
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XoR_

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It is better to put more of E-cores instead of more P-cores, especially for programs which scale well with available threads like video encoding.
Intel went with good design allowing them to compete despite lower process node.
 

D-EJ915

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techtechpotato/toms posted about a 34 core p-core only cpu at the Intel event

 

Grebuloner

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techtechpotato/toms posted about a 34 core p-core only cpu at the Intel event


Saw this and a better die look from WCCF. Would really hope that HEDT(X not W) comes to pass... But would this mean RPL has AVX-512+maybe AMX built in? :nailbiting: The cores look identical to the mainstream die shots and the vector units have clear differences in appearance because of their die area.
 

Epyon

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They said that looks like Sapphire Rapids and was mis labeled and the die was to big for z690
 

kirbyrj

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Saw this and a better die look from WCCF. Would really hope that HEDT(X not W) comes to pass... But would this mean RPL has AVX-512+maybe AMX built in? :nailbiting: The cores look identical to the mainstream die shots and the vector units have clear differences in appearance because of their die area.

I don't think RPL is going to have AVX 512 because the E cores don't have AVX 512 and they can't schedule properly with differing sets of instructions. All of the AVX 512 "enable" bios tricks turned off the E cores to make it work, and I don't think the RPL E cores are that much different than the ADL ones...there are just more of them.
 

Grebuloner

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I don't think RPL is going to have AVX 512 because the E cores don't have AVX 512 and they can't schedule properly with differing sets of instructions. All of the AVX 512 "enable" bios tricks turned off the E cores to make it work, and I don't think the RPL E cores are that much different than the ADL ones...there are just more of them.
You're right in that mainstream desktop won't have AVX512 available to the end user, but even with ADL post-512 disable the units were still present in the silicon even if they couldn't be used (I recall something about Sapphire Rapids and cut and paste product designs which is why it was there in the first place and intended to be fused off, but SPR has AMX+more L2). So in the case of the 34 core P-only chip, couldn't it be possible that 512 is still present in silicon and waiting for an application like HEDT?
 

kirbyrj

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You're right in that mainstream desktop won't have AVX512 available to the end user, but even with ADL post-512 disable the units were still present in the silicon even if they couldn't be used (I recall something about Sapphire Rapids and cut and paste product designs which is why it was there in the first place and intended to be fused off, but SPR has AMX+more L2). So in the case of the 34 core P-only chip, couldn't it be possible that 512 is still present in silicon and waiting for an application like HEDT?

Yeah, I suppose anything is possible at this point. I should have read a little more closely and noted that you weren't necessarily talking about mainstream.

The fact that AMD supports AVX 512 in their mainstream part seems to put the onus back on Intel, and I would expect any future E cores to enable AVX 512 across the lineup (even if Joe Sixpack isn't necessarily going to use it in his Facebook machine).
 

Grebuloner

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Yeah, I suppose anything is possible at this point. I should have read a little more closely and noted that you weren't necessarily talking about mainstream.

The fact that AMD supports AVX 512 in their mainstream part seems to put the onus back on Intel, and I would expect any future E cores to enable AVX 512 across the lineup (even if Joe Sixpack isn't necessarily going to use it in his Facebook machine).
While I'm not the biggest fan of AMDs current chiplet strategy (after 4 Zens, they should be at 12/16/more cores per CCX, not 8) I definitely admire their "one CCD for most parts" method that essentially gives all the same core capabilities to all segments from mainstream to server. Really keeps things clean.
 

vegeta535

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Well, I Pre ordered the 13900K. That should hold me over till i get that 34C SPR that was leaked a few days ago. I think I will be happy with a 41% uplift in encoding speed more or less.
I would be in for a 16Pcore Intel HEDT. 34c Intel is going to be a $3k cpu at least.
 

toast0

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I don't think RPL is going to have AVX 512 because the E cores don't have AVX 512 and they can't schedule properly with differing sets of instructions.
I mean, OS schedulers don't schedule for that, but that doesn't mean they can't. If Intel said, hey you guys, this is what's gonna happen, their Linux kernel peeps could put out some patches, and they could get Microsoft to put it in for some future version. It'd be a little bit wonky, because you'd need to know the number of cores in general and the number of avx-512 cores if you're going to run avx-512 heavy software. But if it's just a bit here and there, trap on avx-512 (which is easy enough) and then pause the process waiting on a P-core. Maybe some heuristics to pin avx-512 heavy threads for programs that aren't smart enough to pin threads on their own. And some magic around cpuid etc.
 

kirbyrj

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I mean, OS schedulers don't schedule for that, but that doesn't mean they can't. If Intel said, hey you guys, this is what's gonna happen, their Linux kernel peeps could put out some patches, and they could get Microsoft to put it in for some future version. It'd be a little bit wonky, because you'd need to know the number of cores in general and the number of avx-512 cores if you're going to run avx-512 heavy software. But if it's just a bit here and there, trap on avx-512 (which is easy enough) and then pause the process waiting on a P-core. Maybe some heuristics to pin avx-512 heavy threads for programs that aren't smart enough to pin threads on their own. And some magic around cpuid etc.

I was just going by what I read was the Intel marketing line. Probably had more to do with artificial product segmentation.
 
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